IN-DEPTH TECHNOLOGY

The circuit is a high efficiency, fixed interleaved frequency 1.4MHz, current mode PWM boost DC/DC converter. It consists of an Input Pin in which the battery input voltage is applied to the IC. There are two phases in the circuit in which 2 inductors are attached to the Vin and the two switch nodes of SW1 and SW2 respectively. At each node of the SW1 and SW2, there is a NFET1 and a NFET2 that connects to ground from the respective inductor. There is also PFET1 and PFET2 that are attached from SW1 and SW2 to the output voltage pins. The output voltage pins VO1 and VO2 are connected together to form one output for the application. Overall you have two boost circuits interleaved at 180 degrees with each one providing half of the power to the output. The NFET turns on at a duty cycle determined by the EA monitoring the output voltage. Once the NFET completes its Ton times, it turns off and the PFET turns on for the remainder of the cycle thus giving the circuit a synchronous switching between the NFET and the PFET with very fast rise times to minimize switching losses.

     The circuit operates at an internally trimmed clock of 1.4Mhz. Each phase operates at 180 degrees from each other. Each phases Ton is set by the same EA signal so that the current ramp signal is sensed by the comparator1 and comparator2 and both of these signals are compared to the common EA signal so that both currents during the NFET on time are matched against a common EA signal and logic. This insures current sharing between the two phases but does not account for the difference of current amplitude caused by the tolerance of inductance in the circuit which is minimal. The circuit also runs in burst mode once you are below a predetermined current level for improved efficiency at lighter load conditions.

    The EA is internally compensated by a Pole  and a Zero  in order to shape the phase gain response of the Boost converters small signal transfer function. The circuit  is very stable under all conditions. The VO1 and V02 are compared against a reference which is further modified by a set of trimmed resistors internal to the circuit. This signal is fed into the EA and is modified by the Pole and Zero properties in the transfer function to give an output in which both current signals are independently compared to for a good current mode control. Internally there is slope compensation on the current sense signals to insure that once you go past a perdetermined point in the duty cycle, the circuit will not exhibit any subharmonic oscillations and the circuit remains stable throughout the entire frequency domain.

     The circuit has internal temperature shutdown where the NFET temperature is monitored. An OVP signal independently operates to shut down the circuit if an overvoltage condition occurs..